目录
产品概述 返回TOPfO6嘉泰姆
The CXLC8980 consists of 14+1 channel buffers target
toward the needs of thin film transistor liquid crystal
display (TFT LCD). This device incorporates one
Vcom buffer and 14 gamma buffers, and are programmed
through I2
C interface. It contains two register
banks which can store two different sets of gamma
reference values. Each buffer is capable of driving
heavy capacitive loads and offering large current loading
(Vcom: 100mA, Gammas: 25mA).
The CXLC8980 is available in the TQFN5X5-32 package.
产品特点 返回TOPfO6嘉泰姆
„ Supply Operation Range : 6.5V to 18VfO6嘉泰姆
„ 14+1 Channels : fO6嘉泰姆
--- 14 Channel Rail-to-Rail Programmable
Gamma Buffers fO6嘉泰姆
Š 10 bits Resolution for each Channel fO6嘉泰姆
Š 25mA Output Current for each Channel fO6嘉泰姆
Š 2 Banks Registers Using Bank_Sel to Select
which Bank Data Output fO6嘉泰姆
---1 Channel Rail-to-Rail Vcom Buffer: fO6嘉泰姆
Š 7 Bits Adjustable Output fO6嘉泰姆
Š ±100mA Output Current fO6嘉泰姆
Š ±140mA Output Short-Circuit Current fO6嘉泰姆
Š 20V/μs Slew Rate fO6嘉泰姆
„ 2-Wire I2
C Slave Mode InterfacefO6嘉泰姆
„ Using One Control Pin Enable to Store Data into
Non-Volatile Memory (NVM) fO6嘉泰姆
„ Non-Volatile Memory (NVM) Store Setting
(at Least 100 Re-Write Times) fO6嘉泰姆
„ TQFN5X5-32 PackagefO6嘉泰姆
应用范围 返回TOPfO6嘉泰姆
TFT-LCD Monitors fO6嘉泰姆
„ LCD TelevisionsfO6嘉泰姆
技术规格书（产品PDF) 返回TOP fO6嘉泰姆
需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持</span>！</span>
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产品封装图 返回TOPfO6嘉泰姆
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电路原理图 返回TOPfO6嘉泰姆
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ntegrated BufferfO6嘉泰姆 |
Part NO.fO6嘉泰姆 | VDDfO6嘉泰姆 (V)fO6嘉泰姆 minfO6嘉泰姆 | VDD fO6嘉泰姆 (V)fO6嘉泰姆 maxfO6嘉泰姆 | CH fO6嘉泰姆 Vr+fO6嘉泰姆 VcomfO6嘉泰姆 | IOUTfO6嘉泰姆 (mA) fO6嘉泰姆 Vr,VcomfO6嘉泰姆 | S/R fO6嘉泰姆 (V/μs）</span>fO6嘉泰姆 Vr,VcomfO6嘉泰姆 | BW (MHz）</span>fO6嘉泰姆 Vr,VcomfO6嘉泰姆 | ISC (mA)fO6嘉泰姆 Vr,VcomfO6嘉泰姆 | NotefO6嘉泰姆 | PackagefO6嘉泰姆 |
CXLC8973fO6嘉泰姆 | 6.5fO6嘉泰姆 | 18fO6嘉泰姆 | 1fO6嘉泰姆 | 100fO6嘉泰姆 | 20fO6嘉泰姆 | 19fO6嘉泰姆 | 260fO6嘉泰姆 | SMBus, Rail-to-Rail OutputfO6嘉泰姆 | TDFN3X3-10fO6嘉泰姆 |
CXLC8974fO6嘉泰姆 | 9fO6嘉泰姆 | 20fO6嘉泰姆 | 14+1fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 16, 70fO6嘉泰姆 | 10, 19fO6嘉泰姆 | 100, 260fO6嘉泰姆 | Rail-to-Rail Output, fO6嘉泰姆 SMBus,2 Banks MTPfO6嘉泰姆 | QFN5X5-32fO6嘉泰姆 |
CXLC8975fO6嘉泰姆 | 6.5fO6嘉泰姆 | 19.5fO6嘉泰姆 | 18+1fO6嘉泰姆 | 30, 100fO6嘉泰姆 | 16, 80fO6嘉泰姆 | 9, 15fO6嘉泰姆 | 120, 300fO6嘉泰姆 | Rail-to-Rail OutputfO6嘉泰姆 | TQFP7X7-48/(FD)fO6嘉泰姆 |
CXLC8976fO6嘉泰姆 | 6.5fO6嘉泰姆 | 19.5fO6嘉泰姆 | 14+1fO6嘉泰姆 | 30, 100fO6嘉泰姆 | 16, 80fO6嘉泰姆 | 9, 15fO6嘉泰姆 | 120, 300fO6嘉泰姆 | Rail-to-Rail OutputfO6嘉泰姆 | TQFP7X7-48/(FD)fO6嘉泰姆 |
CXLC8977fO6嘉泰姆 | 7fO6嘉泰姆 | 20fO6嘉泰姆 | 12+1fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 16, 50fO6嘉泰姆 | 30fO6嘉泰姆 | 100, 300fO6嘉泰姆 | Rail-to-Rail Output, fO6嘉泰姆 SMBus,2 Banks REGfO6嘉泰姆 | QFN4X4-24fO6嘉泰姆 |
CXLC8978fO6嘉泰姆 | 7fO6嘉泰姆 | 20fO6嘉泰姆 | 16+2fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 16, 50fO6嘉泰姆 | 30fO6嘉泰姆 | 100, 300fO6嘉泰姆 | Rail-to-Rail Output,fO6嘉泰姆 SMBus,2 Banks MTPfO6嘉泰姆 | QFN5X5-28fO6嘉泰姆 |
CXLC8979fO6嘉泰姆 | 7fO6嘉泰姆 | 20fO6嘉泰姆 | 12+1+1fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 16, 50fO6嘉泰姆 | 30fO6嘉泰姆 | 100, 300fO6嘉泰姆 | Rail-to-Rail Output, SMBus,Banks MTP, CRCfO6嘉泰姆 | QFN4X4-24fO6嘉泰姆 |
CXLC8980fO6嘉泰姆 | 6.5fO6嘉泰姆 | 18fO6嘉泰姆 | 14+1fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 20, 20fO6嘉泰姆 | 10, 20fO6嘉泰姆 | 75, 140fO6嘉泰姆 | Rail-to-Rail Output,SMBusfO6嘉泰姆 ,2 Banks MTP, ChecksumfO6嘉泰姆 | TQFN5X5-32fO6嘉泰姆 |
CXLC8981fO6嘉泰姆 | 7fO6嘉泰姆 | 18fO6嘉泰姆 | 1fO6嘉泰姆 | 100fO6嘉泰姆 | 23fO6嘉泰姆 | 20fO6嘉泰姆 | 270fO6嘉泰姆 | SMBus,Rail-to-Rail OutputfO6嘉泰姆 | TDFN3X3-8fO6嘉泰姆 |
CXLC8982fO6嘉泰姆 | 7fO6嘉泰姆 | 18fO6嘉泰姆 | 1fO6嘉泰姆 | 100fO6嘉泰姆 | --fO6嘉泰姆 | --fO6嘉泰姆 | --fO6嘉泰姆 | SMBus, VCOM REFfO6嘉泰姆 | TDFN3X3-8fO6嘉泰姆 |
CXLC8983fO6嘉泰姆 | 7fO6嘉泰姆 | 20fO6嘉泰姆 | 8+1fO6嘉泰姆 | 25, 100fO6嘉泰姆 | 16, 50fO6嘉泰姆 | 30fO6嘉泰姆 | 100, 300fO6嘉泰姆 | SMBus, Rail-to-Rail fO6嘉泰姆 Output,2 Bank MTPfO6嘉泰姆 | QFN4X4-24fO6嘉泰姆 |
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