Complete DDR2, DDR3 and DDR3L Memory Solution Synchronous Buck PWM Controller, 2A LDO, Buffered Reference CXSD62355 high efficiency at a reduced cost by eliminating the current-sense resistor found in

发布时间:2020-04-06 09:43:38 浏览次数:715 作者:嘉泰姆
摘要:Complete DDR2, DDR3 and DDR3L Memory Solution Synchronous Buck PWM Controller, 2A LDO, Buffered Reference CXSD62355 high efficiency at a reduced cost by eliminating the current-sense resistor found in

目录

1.产品概述       2.产品特点     pXG嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)</span>pXG嘉泰姆

5.产品封装       6.电路原理图</strong>  pXG嘉泰姆

7.相关产品pXG嘉泰姆

   产品概述 返回TOPpXG嘉泰姆


The CXSD62355 is intended for DDR2, DDR3 and DDR3L memory systems. It integrates a synchronous buck PWM controller with a 2-A sink-source linear regulator and buffered reference. The PWM controller uses constant on-time control scheme to handle wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The CXSD62355 achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronous rectifier MOSFETs. Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. The 2A sink/source tracking termination regulator is specifically designed for low-cost/ low-external component count systems. The regulator contains a high speed operational amplifier that provides fast load transient response with only 10μF of ceramic output capacitance. The CXSD62355 supports remote sensing functions and all features required to power the DDR2 /DDR3 /DDR3L VTT bus termination according to the JEDEC specification. In addition, the CXSD62355 includes integrated sleep-state controls placing VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S4/S5 (Shutdown). The CXSD62355 provides OVP, UVP, over current and thermal shutdown protection functions and is available in a 20-pin 3X3 TQFN package.

   产品特点 返回TOPpXG嘉泰姆


•Synchronous Buck Controller (VDDQ) pXG嘉泰姆

„ Ultra-High Efficiency at Light and Heavy Load with Auto-skip Function „ No Current-Sense Resistor (Lossless ILIMIT) pXG嘉泰姆

„ Quasi-PWM with 100ns Load-Step Response pXG嘉泰姆

„ 0.7V to 1.8V Adjustable Output Range pXG嘉泰姆

„ 3V to 28V Battery Input Range pXG嘉泰姆

„ 0.8% Vref Accuracy pXG嘉泰姆

„ Supports Soft-off in S4/S5 StatespXG嘉泰姆

„ Selectable 300k/400kHz Switching Frequency pXG嘉泰姆

„ OVP & UVP of VDDQ Output pXG嘉泰姆

„ Drives Large Synchronous-Rectifier FETs pXG嘉泰姆

„ Power-Good Indicator pXG嘉泰姆

•2-A LDO (VTT), Buffered Reference (VTTREF) pXG嘉泰姆

„ VLDOIN Voltage Range: 1.2 V to 3.6 V pXG嘉泰姆

„ Requires Only 10μF Ceramic VTT Output Capacitance pXG嘉泰姆

„ Supports High-Z in S3 and Soft-Off in S4/S5pXG嘉泰姆

„ Integrated Divider Tracks 1/2 VDDQSNS for Both VTT and VTTREF pXG嘉泰姆

„ Remote Sensing (VTTSNS) pXG嘉泰姆

„ ±20mV VTT and 0.8% VTTREF Accuracy pXG嘉泰姆

„ 10mA Buffered Reference (VTTREF) pXG嘉泰姆

„ Built-In Soft-Start to Reduce the VLDOIN Surging Current pXG嘉泰姆

„ Over Current Protection of VTT Output pXG嘉泰姆

„ Thermal Shutdown ProtectionpXG嘉泰姆

   应用范围 返回TOPpXG嘉泰姆


„ Notebook Computers pXG嘉泰姆

„ CPU Core Supply pXG嘉泰姆

„ Chipset/RAM Supply as Low as 0.7VpXG嘉泰姆

   技术规格书(产品PDF) 返回TOP pXG嘉泰姆


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 QQ截图20160419174301.jpgpXG嘉泰姆

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Synchronous (Quasi-PWM) Step Down ControllerpXG嘉泰姆

Part   NO.pXG嘉泰姆

Vin(V)pXG嘉泰姆

min.pXG嘉泰姆

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FBpXG嘉泰姆

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300/400pXG嘉泰姆

0.8pXG嘉泰姆

EN, SS, PGOOD,   OVP, UVP, OCP, VTTREF, Built-in BST diode, DDR1/2/3/3L, 2A LDO for VTTpXG嘉泰姆

TQFN3X3-20pXG嘉泰姆

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4.5pXG嘉泰姆

28pXG嘉泰姆

0.7~2.6pXG嘉泰姆

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0.7pXG嘉泰姆

EN,   PGOOD, OVP, UVP, OCP, VOUT Adjustable,1.5ms VOUT Servo Soft Start, 4700ppm/°C   RON Coefficient pXG嘉泰姆

TDFN3X3-10pXG嘉泰姆

CXSD62357pXG嘉泰姆

4.5pXG嘉泰姆

28pXG嘉泰姆

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TQFN2X2-12pXG嘉泰姆

CXSD62358pXG嘉泰姆

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24pXG嘉泰姆

0.75~3.6pXG嘉泰姆

ADJpXG嘉泰姆

0.75pXG嘉泰姆

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0.75pXG嘉泰姆

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TQFN3X3-16pXG嘉泰姆

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