1.5MHz高效单片同步降压调节器CXSD62130电流模式方案100%占空比从2.7V到6.0V的输入

目录jgu嘉泰姆

1.产品概述                       2.产品特点jgu嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 jgu嘉泰姆
5.产品封装图                     6.电路原理图                   jgu嘉泰姆
7.功能概述                        8.相关产品jgu嘉泰姆

一,产品概述(General Description)   jgu嘉泰姆

 CXSD62130 CXSD62130A is a 1.5MHz high efficiency monolithic synchronous buck regulator. Design with current mode scheme,the CXSD62130 CXSD62130A is stable jgu嘉泰姆

with ceramic output capacitor. Input voltage from 2.7V to 6.0V makes the jgu嘉泰姆

CXSD62130 CXSD62130A ideally suited for single Li-Ion battery powered jgu嘉泰姆

applications. 100%duty cycle provides low dropout operation, extending jgu嘉泰姆

battery life in portable electrical devices. Theinternally fixed 1.5MHz jgu嘉泰姆

operating frequency allows the using of small surface mount inductors and capacitors. The synchronous switches included inside increase the efficiencyjgu嘉泰姆

and eliminate the need of an external Schottky diode.jgu嘉泰姆
   The CXSD62130 CXSD62130A is available in TDFN2x2-6 packages.jgu嘉泰姆
二.产品特点(Features)jgu嘉泰姆

1A Output Currentjgu嘉泰姆
Wide 2.7V~6.0V Input Voltagejgu嘉泰姆
Fixed 1.5MHz Switching Frequencyjgu嘉泰姆
Low Dropout Operating at 100% Duty Cyclejgu嘉泰姆
25μA Quiescent Currentjgu嘉泰姆
Synchronous Rectifierjgu嘉泰姆
0.6V Reference Voltagejgu嘉泰姆
<0.5μA Input Current During Shutdownjgu嘉泰姆
Short-Circuit Protectionjgu嘉泰姆
Over-Temperature Protectionjgu嘉泰姆
Available in TDFN2x2-6 Packagesjgu嘉泰姆
Lead Free and Green Devices Availablejgu嘉泰姆
(RoHS Compliant)jgu嘉泰姆
三,应用范围 (Applications)jgu嘉泰姆

HD STBjgu嘉泰姆
BT Mousejgu嘉泰姆
PND Instrumentjgu嘉泰姆
Portable Instrumentjgu嘉泰姆
四.下载产品资料PDF文档 jgu嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！jgu嘉泰姆

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五,产品封装图 (Package)jgu嘉泰姆

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六.电路原理图jgu嘉泰姆

jgu嘉泰姆
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七,功能概述jgu嘉泰姆

Main Control Loopjgu嘉泰姆
The CXSD62130 CXSD62130A is a constant frequency, synchronous rectifier and current-mode jgu嘉泰姆

switching regulato r. In normal operation, the internal P-channel power MOSFET is turned on eachjgu嘉泰姆

 cycle. The peak inductor current at which ICMP turn off the P-FET is controlled by the voltage onjgu嘉泰姆

 the COMP node, which is the output of the error amplifier (EAMP). An external resistive divider jgu嘉泰姆

connected between VOUT and ground allows the EAMP to receive an output feedback voltage jgu嘉泰姆

VFB at FB pin. When the load current increases, it causes a slightly decrease in VFB relative tojgu嘉泰姆

the 0.6V reference, which in turn causes the COMP voltage to increase until the average jgu嘉泰姆

inductor current matches the new load current.jgu嘉泰姆
Enable/Shutdownjgu嘉泰姆
Driving RUN to the ground places the CXSD62130 CXSD62130A in shutdown mode. Whenjgu嘉泰姆

 in shutdown, the internal power MOSFETs turn off, all internal circuitry shuts down and thejgu嘉泰姆

 quiescent supply current reduces to 0.5μA maximum.jgu嘉泰姆
Pulse Frequency Modulation Mode (PFM)jgu嘉泰姆
The CXSD62130 CXSD62130A is a fixed frequency, peak current mode PWM step-down jgu嘉泰姆

converter. At light loads, the CXSD62130 CXSD62130A will automatically enter in pulse jgu嘉泰姆

frequency mode operation to reduce the dominant switching losses. In PFM operation, jgu嘉泰姆

the inductor current may reach zero or reverse on each pulse. A zero current comparator jgu嘉泰姆

turn off the N-FET, forcing DCM operation at light load. These controls get very low jgu嘉泰姆

quiescent current, help to maintain high effi-ciency over the complete load range.jgu嘉泰姆
Slope Compensation and Inductor Peak Currentjgu嘉泰姆
The CXSD62130 CXSD62130A is a peak current mode PWM step downconverter. Tojgu嘉泰姆

 prevent sub-harmonic oscillations, theCXSD62130 CXSD62130A sense the peak current and jgu嘉泰姆

add slope compensation to stable the converter. It is accomplished in-ternally by addingjgu嘉泰姆

a compensating ramp to the inductor current signal at duty cycles in excess of 40%.jgu嘉泰姆

 Normally,this results in a reduction of maximum inductor peak current for duty cycles >jgu嘉泰姆

 40%. However, the CXSD62130 CXSD62130A uses a special scheme that counteracts this jgu嘉泰姆

compensating ramp, which allows the maximum inductor peak current to remain unaffectedjgu嘉泰姆

 throughout all duty cycles.jgu嘉泰姆
Dropout Operationjgu嘉泰姆
As the input supply voltage decreases to a value ap-proaching the output voltage, the dutyjgu嘉泰姆

 cycle increases toward the maximum on time. Further, reduction of thesupply voltage forces jgu嘉泰姆

the main switch to remain on for more than one cycle until it reaches 100% duty cycle. Thejgu嘉泰姆

 input voltage minus the voltage drop will determine the output voltage across the P-FETjgu嘉泰姆

 and the inductor.An important detail to remember is that on resistance of P-FET switch jgu嘉泰姆

will increase at low input supply voltageTherefore, the user should calculate the power dissipa-jgu嘉泰姆
tion when the CXSD62130 CXSD62130A is used at 100% duty cycle with low input voltage.jgu嘉泰姆
Over-Temperature Protection (OTP)jgu嘉泰姆
The over-temperature circuit limits the junction tempera-ture of the CXSD62130 CXSD62130A. jgu嘉泰姆

When the junction temperature ex-ceeds 150oC, a thermal sensor turns off the both power jgu嘉泰姆

MOSFETs, allowing the devices to cool. The thermal sen-sor allows the converters to start a jgu嘉泰姆

soft-start process and regulate the output voltage again after the junction tem-perature coolsjgu嘉泰姆

 by 30oC. The OTP is designed with a 30oC hysteresis to lower the average Junctionjgu嘉泰姆

 Temperature (TJ) during continuous thermal overload conditions, in-creasing the lifetime jgu嘉泰姆

of the device.jgu嘉泰姆
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