The APL5338,APL5338A,APL5337 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.

发布时间:2020-04-06 09:43:38 浏览次数:702 作者:嘉泰姆
摘要:The APL5338,APL5338A,APL5337 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.
The APL5338,APL5338A,APL5337 linear regulator is designed to provide a  regulated voltage with bi-directional output current for  DDR-SDRAM termination.

FeaturesRvz嘉泰姆


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Sourcing and Sinking Current up to 2ARvz嘉泰姆

Wide Input Voltage Range: 1.2V to 3.6VRvz嘉泰姆

VTT and VTTREF Voltage Tracks at Half the VREFRvz嘉泰姆

VoltageRvz嘉泰姆

VTT and VTTREF Voltage with ±10mV AccuracyRvz嘉泰姆

Excellent Load Transient ResponseRvz嘉泰姆

Stable with 10µF Ceramic Output CapacitorRvz嘉泰姆

Current-Limit ProtectionRvz嘉泰姆

Thermal Shutdown ProtectionRvz嘉泰姆

Power-On-Reset Function on VCNTLRvz嘉泰姆

S3, S5 Input Signals for ACPI StatesRvz嘉泰姆

Small MSOP-10P and TDFN3x3-10 PackagesRvz嘉泰姆

Lead Free and Green Devices AvailableRvz嘉泰姆

(RoHS Compliant)Rvz嘉泰姆


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General DescriptionRvz嘉泰姆

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The APL5338 linear regulator is designed to provide aRvz嘉泰姆

regulated voltage with bi-directional output current forRvz嘉泰姆

DDR-SDRAM termination. The APL5338 integrates twoRvz嘉泰姆

power transistors to source or sink current up to 2A. ItRvz嘉泰姆

also incorporates current-limit and thermal shutdown intoRvz嘉泰姆

a single chip.Rvz嘉泰姆

The output voltage of APL5338 tracks the voltage at VREFRvz嘉泰姆

pin. An internal resistor divider is used to provide a halfRvz嘉泰姆

voltage of VREF for VTTREF and VTT Voltage. The VTTRvz嘉泰姆

output voltage is only requiring 10µF of ceramic outputRvz嘉泰姆

capacitance for stability and fast transient response. TheRvz嘉泰姆

S3 and S5 pins provide the sleep state for VTT (S3 state)Rvz嘉泰姆

and suspend state (S4/S5 state) for device when S5 andRvz嘉泰姆

S3 are both pulled low the device provides the soft-off forRvz嘉泰姆

VTT and VTTREF. The MSOP-10P and TDFN3x3-10 pack-Rvz嘉泰姆

age with a copper pad is available which provides excel-Rvz嘉泰姆

lent thermal impedance.Rvz嘉泰姆

QQ截图20150709191430.gifRvz嘉泰姆


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相关文件Rvz嘉泰姆

Part_No Rvz嘉泰姆

 PackageRvz嘉泰姆

 & Pins Rvz嘉泰姆

 InputRvz嘉泰姆

 VoltageRvz嘉泰姆

 (V) Rvz嘉泰姆

 VCNTLRvz嘉泰姆

 VoltageRvz嘉泰姆

 (V) Rvz嘉泰姆

 QuiescentRvz嘉泰姆

 CurrentRvz嘉泰姆

 (typ)(uA) Rvz嘉泰姆

 OutputRvz嘉泰姆

 SinkRvz嘉泰姆

 CurrentRvz嘉泰姆

 (max)(A) Rvz嘉泰姆

 OutputRvz嘉泰姆

 SourceRvz嘉泰姆

 CurrentRvz嘉泰姆

 (max)(A) Rvz嘉泰姆

 DDRRvz嘉泰姆

 Power Rvz嘉泰姆

 VTTREF Rvz嘉泰姆

 S3/S5 Rvz嘉泰姆

minRvz嘉泰姆

maxRvz嘉泰姆

minRvz嘉泰姆

maxRvz嘉泰姆

APL5331Rvz嘉泰姆

SOP-8
  SOP-8P
  TO-252-5
  TO-263-5
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1.2Rvz嘉泰姆

3.5Rvz嘉泰姆

3.1Rvz嘉泰姆

6Rvz嘉泰姆

3900Rvz嘉泰姆

3Rvz嘉泰姆

3Rvz嘉泰姆

DDR1
  DDR2
  DDR3
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APL5333Rvz嘉泰姆

MSOP-10Rvz嘉泰姆

1.2Rvz嘉泰姆

3.6Rvz嘉泰姆

4.5Rvz嘉泰姆

5.5Rvz嘉泰姆

2000Rvz嘉泰姆

3Rvz嘉泰姆

3Rvz嘉泰姆

DDR1
  DDR2
  DDR3
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APL5338Rvz嘉泰姆

MSOP-10
  TDFN3x3-10
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1.2Rvz嘉泰姆

3.6Rvz嘉泰姆

4.5Rvz嘉泰姆

5.5Rvz嘉泰姆

600Rvz嘉泰姆

2Rvz嘉泰姆

2Rvz嘉泰姆

DDR2
  DDR3
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YRvz嘉泰姆

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APL5338ARvz嘉泰姆

MSOP-10
  TDFN3x3-10
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1.2Rvz嘉泰姆

3.6Rvz嘉泰姆

3.1Rvz嘉泰姆

5.5Rvz嘉泰姆

600Rvz嘉泰姆

2Rvz嘉泰姆

2Rvz嘉泰姆

DDR2
  DDR3
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APL5337Rvz嘉泰姆

SOP-8
  SOP-8P
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1.1Rvz嘉泰姆

4.5Rvz嘉泰姆

3Rvz嘉泰姆

5.5Rvz嘉泰姆

1000Rvz嘉泰姆

2Rvz嘉泰姆

2Rvz嘉泰姆

DDR2
  DDR3
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