2A Sink/Source Bus Termination Regulator CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR)

发布时间:2020-04-06 09:43:38 浏览次数:713 作者:嘉泰姆
摘要:2A Sink/Source Bus Termination Regulator CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR)

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1.产品概述       2.产品特点     wGW嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)</span>wGW嘉泰姆

5.产品封装       6.电路原理图</strong>  wGW嘉泰姆

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The CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage. The CXTP65162 CXTP65161 CXTP65160 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The CXTP65162 CXTP65161 CXTP65160 are available in the PSOP-8 (Exposed Pad) surface mount packages.

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 Ideal for DDR-I, DDR-II and DDR-III VTT Applications wGW嘉泰姆

 Sink and Source 2A Continuous Current wGW嘉泰姆

 Integrated Power MOSFETs wGW嘉泰姆

 Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces. wGW嘉泰姆

 High Accuracy Output Voltage at Full-Load wGW嘉泰姆

 Output Voltage traces REFEN Pin Voltage. wGW嘉泰姆

 Low External Component Count wGW嘉泰姆

 Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output wGW嘉泰姆

 Current Limiting Protection wGW嘉泰姆

 Thermal Shutdown Protection wGW嘉泰姆

 PSOP-8 with exposed pad Pb-Free Package.wGW嘉泰姆

   应用范围 返回TOPwGW嘉泰姆


 Desktop PCs, Notebooks, and Workstations wGW嘉泰姆

 Graphics Card Memory Termination wGW嘉泰姆

 Set Top Boxes, Digital TVs, Printers wGW嘉泰姆

 Embedded Systems wGW嘉泰姆

 Active Termination Buses wGW嘉泰姆

 DDR-I, DDR-II and DDR-III Memory SystemswGW嘉泰姆

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DDR Bus Termination Regulator(DDR总线终端稳压器)  wGW嘉泰姆

ProductwGW嘉泰姆

Status wGW嘉泰姆

Output Offset VoltagewGW嘉泰姆

Load Reg.wGW嘉泰姆

Max Sink& Source Current wGW嘉泰姆

VIN    MaxwGW嘉泰姆

Control Voltage RangewGW嘉泰姆

CXTP65160wGW嘉泰姆

NRFND wGW嘉泰姆

±20mV wGW嘉泰姆

0.8%,1.2% wGW嘉泰姆

 3AwGW嘉泰姆

6V wGW嘉泰姆

3.3V to   6V wGW嘉泰姆

CXTP65161wGW嘉泰姆

Active wGW嘉泰姆

±20mVwGW嘉泰姆

0.50%wGW嘉泰姆

 1.5wGW嘉泰姆

6VwGW嘉泰姆

3.3V  to 6V wGW嘉泰姆

CXTP65162wGW嘉泰姆

Active wGW嘉泰姆

±20mV wGW嘉泰姆

0.50%wGW嘉泰姆

 2AwGW嘉泰姆

6VwGW嘉泰姆

3.3V to   6V wGW嘉泰姆

wGW嘉泰姆

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