2A Sink/Source Bus Termination Regulator CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR)

发布时间:2020-04-06 09:43:38 浏览次数:702 作者:嘉泰姆
摘要:2A Sink/Source Bus Termination Regulator CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR)

目录

1.产品概述       2.产品特点     M3V嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)</span>M3V嘉泰姆

5.产品封装       6.电路原理图</strong>  M3V嘉泰姆

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   产品概述 返回TOPM3V嘉泰姆


The CXTP65162 CXTP65161 CXTP65160 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requirements. The regulator is capable of actively sinking or sourcing up to 2A while regulating an output voltage to within 40mV. The output termination voltage cab be tightly regulated to track 1/2VDDQ by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage. The CXTP65162 CXTP65161 CXTP65160 also incorporates a high-speed differential amplifier to provide ultra-fast response in line/load transient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The CXTP65162 CXTP65161 CXTP65160 are available in the PSOP-8 (Exposed Pad) surface mount packages.

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 Ideal for DDR-I, DDR-II and DDR-III VTT Applications M3V嘉泰姆

 Sink and Source 2A Continuous Current M3V嘉泰姆

 Integrated Power MOSFETs M3V嘉泰姆

 Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces. M3V嘉泰姆

 High Accuracy Output Voltage at Full-Load M3V嘉泰姆

 Output Voltage traces REFEN Pin Voltage. M3V嘉泰姆

 Low External Component Count M3V嘉泰姆

 Shutdown for Suspend to RAM (STR) Functionality with High-Impedance Output M3V嘉泰姆

 Current Limiting Protection M3V嘉泰姆

 Thermal Shutdown Protection M3V嘉泰姆

 PSOP-8 with exposed pad Pb-Free Package.M3V嘉泰姆

   应用范围 返回TOPM3V嘉泰姆


 Desktop PCs, Notebooks, and Workstations M3V嘉泰姆

 Graphics Card Memory Termination M3V嘉泰姆

 Set Top Boxes, Digital TVs, Printers M3V嘉泰姆

 Embedded Systems M3V嘉泰姆

 Active Termination Buses M3V嘉泰姆

 DDR-I, DDR-II and DDR-III Memory SystemsM3V嘉泰姆

   技术规格书(产品PDF) 返回TOP M3V嘉泰姆


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DDR Bus Termination Regulator(DDR总线终端稳压器)  M3V嘉泰姆

ProductM3V嘉泰姆

Status M3V嘉泰姆

Output Offset VoltageM3V嘉泰姆

Load Reg.M3V嘉泰姆

Max Sink& Source Current M3V嘉泰姆

VIN    MaxM3V嘉泰姆

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NRFND M3V嘉泰姆

±20mV M3V嘉泰姆

0.8%,1.2% M3V嘉泰姆

 3AM3V嘉泰姆

6V M3V嘉泰姆

3.3V to   6V M3V嘉泰姆

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Active M3V嘉泰姆

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0.50%M3V嘉泰姆

 1.5M3V嘉泰姆

6VM3V嘉泰姆

3.3V  to 6V M3V嘉泰姆

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Active M3V嘉泰姆

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0.50%M3V嘉泰姆

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6VM3V嘉泰姆

3.3V to   6V M3V嘉泰姆

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