3-W 单声道 Filterless–D类音频放大器3-W Mono Filterless Class-D Audio Power Amplifier CXAR41171是一款高效率的，3W单声道的D类音频放大器。它用一种低噪声的、filterlessPWM的架构，无需输出滤波器，减少外围器件数，降低系统成本，简化系统设计。当电源电压为5V时，CXAR41171 能在输出负载为4Ω的扬声器上，

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       CXAR41171是一款高效率的，3W单声道的D类音频放大器。它用一种低噪声的、filterlessPWM的架构，无需输出滤波器，减少外围器件数，降低系统成本，简化系统设计。当电源电压为5V时，CXAR41171 能在输出负载为4Ω的扬声器上，输送出3W/10%或2W/1%的输出功率及失真度。与AB类放大器相比，CXAR41171具有高效能的特性。当电源电压3.6 V而输出负载为8Ω扬声器，输出功率400 mW时其效率为88%。在移动电话听筒及耳机的装置上，CXAR41171是能输出悦耳音调的音频功率放大器。CXAR41171的放大音量是允许由外部各音源独立控制的。CXAR41171采用TDFN以及WCSP封装。The CXAR41171 is a high efficiency, 3W mono class-D audio power amplifier. A low noise, filterless PWM architecture eliminates the output filter, reducing external component count, system cost, and simplifying design. Operating in a single 5V supply, CXAR41171 is capable of driving 4Ω speaker load at a continuous average output of 3W/10% THD+N or 2W/1% THD+N. The CXAR41171 has high efficiency with speaker load compared to a typical class AB amplifier. With a 3.6V supply driving an 8Ω speaker , the efficiency for a 400mW power level is 88%. In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the CXAR41171. The gain of CXAR41171 is externally configurable which allows independent gain control from multiple sources by summing signals from separate sources. The CXAR41171 is available in space-saving WCSP and TDFN packages.

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• 单一调变方案来减少EMI干扰jp0嘉泰姆

• 工作电压3.6V,负载8Ω的扬声器:jp0嘉泰姆

- 输出功率400mW时，效率高达88%jp0嘉泰姆

- 输出功率100mW时，效率高达80%jp0嘉泰姆

• 静态电流 2.4mA，关断电流0.5uAjp0嘉泰姆

• 工作电压2.5 V至5.5 Vjp0嘉泰姆

• 采用优化的PWM输出架构，无需输出LC滤波器</p>

• 高PSRR(-72dB)，无需稳压器</p>

• 全差动设计用以抑制射频干扰，无需旁通电容</p>

• 高CMRR，输入无需耦合电容器</p>

• 内部工作频率250kHzjp0嘉泰姆

• 内含POP 及Click噪音抑制电路jp0嘉泰姆

• 1.5mmx1.5mm WCSP 及 3mmx3mm TDFN-8 封装jp0嘉泰姆

• 符合RoHS规范及Pb-Freejp0嘉泰姆

􀁺 Unique Modulation Scheme Reduces EMI Emissionsjp0嘉泰姆

􀁺 Efficiency at 3.6V With an 8-Ω Speaker:jp0嘉泰姆

− 88% at 400 mWjp0嘉泰姆

− 80% at 100 mWjp0嘉泰姆

􀁺 Low 2.4-mA Quiescent Current andjp0嘉泰姆

0.5-μA Shutdown Currentjp0嘉泰姆

􀁺 2.5V to 5.5V Wide Supply Voltagejp0嘉泰姆

􀁺 Shutdown Pin Compatible with 1.8V Logic GPIOjp0嘉泰姆

􀁺 Optimized PWM Output Stage Eliminatesjp0嘉泰姆

LC Output Filterjp0嘉泰姆

􀁺 Improved PSRR (−72 dB) Eliminates Need for ajp0嘉泰姆

Voltage Regulatorjp0嘉泰姆

􀁺 Fully Differential Design Reduces RF Rectificationjp0嘉泰姆

and Eliminates Bypass Capacitorjp0嘉泰姆

􀁺 Improved CMRR Eliminates Two Inputjp0嘉泰姆

Coupling Capacitorsjp0嘉泰姆

􀁺 Internally Generated 250-kHz Switchingjp0嘉泰姆

Frequencyjp0嘉泰姆

􀁺 Integrated Pop and Click Suppression Circuitryjp0嘉泰姆

􀁺 1.5mm× 1.5mm Wafer Chip Scale Package (WCSP)jp0嘉泰姆

and 3mm× 3mm TDFN-8 packagejp0嘉泰姆

􀁺 RoHS compliant and 100% lead(Pb)-freejp0嘉泰姆

   应用范围 返回TOPjp0嘉泰姆

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• 无线或移动电话和PDA应用􀁺jp0嘉泰姆

Ideal for Wireless or cellular Handsets and PDAsjp0嘉泰姆

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