2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

发布时间:2020-06-08 08:20:13 浏览次数:327 作者:oumao18 来源:嘉泰姆
摘要:CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

目录tqj嘉泰姆

1.产品概述                       2.产品特点tqj嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 tqj嘉泰姆
5.产品封装图                     6.电路原理图                   tqj嘉泰姆
7.功能概述                        8.相关产品tqj嘉泰姆

一,产品概述(General Description)         tqj嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.tqj嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.tqj嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withtqj嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewtqj嘉泰姆
rate. All inputs and outputs are rail-to-rail.tqj嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).tqj嘉泰姆
二.产品特点(Features)tqj嘉泰姆


· 2.6V to 6.5V Input Supply Range tqj嘉泰姆

· Current-Mode Step-Up Regulator tqj嘉泰姆

 - Fast Transient Response tqj嘉泰姆

 - 1.2MHz Fixed Operating Frequency tqj嘉泰姆

· ±1.5% High-Accuracy Output Voltage tqj嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET tqj嘉泰姆

· High Efficiency tqj嘉泰姆

· Low Quiescent Current (0.6mA Typical) tqj嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF tqj嘉泰姆

· High-performance Operational Amplifiers tqj嘉泰姆

 - ±150mA Output Short-Circuit Currenttqj嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth tqj嘉泰姆

 - Rail-to-Rail Inputs/Outputs tqj嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs tqj嘉泰姆

· Over-Temperature Protection tqj嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) tqj嘉泰姆

· Lead Free Available (RoHS Compliant)tqj嘉泰姆

三,应用范围 (Applications)tqj嘉泰姆


    TFT LCD Displays for Monitorstqj嘉泰姆
   TFT LCD Displays for Notebook Computerstqj嘉泰姆
   Automotive Displaystqj嘉泰姆
四.下载产品资料PDF文档 tqj嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持tqj嘉泰姆

 QQ截图20160419174301.jpgtqj嘉泰姆

五,产品封装图 (Package)tqj嘉泰姆


blob.pngtqj嘉泰姆
blob.pngPin Function Descriptiontqj嘉泰姆

Pintqj嘉泰姆

Nametqj嘉泰姆

Function Descriptiontqj嘉泰姆

CXSU63137tqj嘉泰姆

CXSU63137-1tqj嘉泰姆

CXSU63137-2tqj嘉泰姆

1tqj嘉泰姆

SRCtqj嘉泰姆

SRCtqj嘉泰姆

SRCtqj嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. Bypasstqj嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.tqj嘉泰姆

2tqj嘉泰姆

REFtqj嘉泰姆

REFtqj嘉泰姆

REFtqj嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum oftqj嘉泰姆
0.22μFcapacitor closed to the pins.tqj嘉泰姆

3tqj嘉泰姆

AGNDtqj嘉泰姆

AGNDtqj嘉泰姆

AGNDtqj嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect totqj嘉泰姆
power ground (PGND) underneath the IC.tqj嘉泰姆

4tqj嘉泰姆

PGNDtqj嘉泰姆

PGNDtqj嘉泰姆

PGNDtqj嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-uptqj嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputtqj嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundtqj嘉泰姆
(AGND) underneath the IC.tqj嘉泰姆

5tqj嘉泰姆

OUT1tqj嘉泰姆

OUT1tqj嘉泰姆

OUT1tqj嘉泰姆

Output of Operational-Amplifier 1tqj嘉泰姆

6tqj嘉泰姆

NEG1tqj嘉泰姆

NEG1tqj嘉泰姆

NEG1tqj嘉泰姆

Inverting Input of Operational-Amplifier 1tqj嘉泰姆

7tqj嘉泰姆

POS1tqj嘉泰姆

POS1tqj嘉泰姆

POS1tqj嘉泰姆

Non-inverting Input of Operational-Amplifier 1tqj嘉泰姆

8tqj嘉泰姆

NCtqj嘉泰姆

OUT2tqj嘉泰姆

OUT2tqj嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internaltqj嘉泰姆
connected of CXSU63137.tqj嘉泰姆

9tqj嘉泰姆

NCtqj嘉泰姆

NEG2tqj嘉泰姆

NEG2tqj嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internaltqj嘉泰姆
connected of CXSU63137.tqj嘉泰姆

10tqj嘉泰姆

ICtqj嘉泰姆

POS2tqj嘉泰姆

POS2tqj嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. Internaltqj嘉泰姆
connected to GND of CXSU63137tqj嘉泰姆

11tqj嘉泰姆

BGNDtqj嘉泰姆

BGNDtqj嘉泰姆

BGNDtqj嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)tqj嘉泰姆
underneath the IC.tqj嘉泰姆

12tqj嘉泰姆

NCtqj嘉泰姆

NCtqj嘉泰姆

POS3tqj嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internaltqj嘉泰姆
connected of CXSU63137/CXSU63137.tqj嘉泰姆

13tqj嘉泰姆

NCtqj嘉泰姆

NCtqj嘉泰姆

OUT3tqj嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.tqj嘉泰姆

14tqj嘉泰姆

SUPtqj嘉泰姆

SUPtqj嘉泰姆

SUPtqj嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. Bypasstqj嘉泰姆
SUP to BGND with a 0.1μF capacitor.tqj嘉泰姆

15tqj嘉泰姆

NCtqj嘉泰姆

POS3tqj嘉泰姆

POS4tqj嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingtqj嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.tqj嘉泰姆

16tqj嘉泰姆

NCtqj嘉泰姆

NEG3tqj嘉泰姆

NEG4tqj嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input oftqj嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.tqj嘉泰姆

17tqj嘉泰姆

NCtqj嘉泰姆

OUT3tqj嘉泰姆

OUT4tqj嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output oftqj嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.tqj嘉泰姆

18tqj嘉泰姆

ICtqj嘉泰姆

ICtqj嘉泰姆

POS5tqj嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedtqj嘉泰姆
to GND of CXSU63137/CXSU63137.tqj嘉泰姆

19tqj嘉泰姆

NCtqj嘉泰姆

NCtqj嘉泰姆

NEG5tqj嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedtqj嘉泰姆
of CXSU63137/CXSU63137.tqj嘉泰姆

20tqj嘉泰姆

NCtqj嘉泰姆

NCtqj嘉泰姆

OUT5tqj嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.tqj嘉泰姆

21tqj嘉泰姆

LXtqj嘉泰姆

LXtqj嘉泰姆

LXtqj嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductortqj嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.tqj嘉泰姆

22tqj嘉泰姆

INtqj嘉泰姆

INtqj嘉泰姆

INtqj嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangetqj嘉泰姆
from 2.6V to 6.5V.tqj嘉泰姆

23tqj嘉泰姆

FBtqj嘉泰姆

FBtqj嘉泰姆

FBtqj嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromtqj嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withintqj嘉泰姆
5mm of FB.tqj嘉泰姆

24tqj嘉泰姆

COMPtqj嘉泰姆

COMPtqj嘉泰姆

COMPtqj嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCtqj嘉泰姆
from COMP to AGND.tqj嘉泰姆

PinFunction Descriptiontqj嘉泰姆

Pintqj嘉泰姆

Nametqj嘉泰姆

Function Descriptiontqj嘉泰姆

CXSU63137tqj嘉泰姆

CXSU63137-1tqj嘉泰姆

CXSU63137-2tqj嘉泰姆

24tqj嘉泰姆

COMPtqj嘉泰姆

COMPtqj嘉泰姆

COMPtqj嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCtqj嘉泰姆
from COMP to AGND.tqj嘉泰姆

25tqj嘉泰姆

FBPtqj嘉泰姆

FBPtqj嘉泰姆

FBPtqj嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of atqj嘉泰姆
resistive voltage-divider between the regulator output and AGND to set thetqj嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividertqj嘉泰姆
close to the pin.tqj嘉泰姆

26tqj嘉泰姆

DRVPtqj嘉泰姆

DRVPtqj嘉泰姆

DRVPtqj嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channeltqj嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.tqj嘉泰姆

27tqj嘉泰姆

FBNtqj嘉泰姆

FBNtqj嘉泰姆

FBNtqj嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of atqj嘉泰姆
resistive voltage-divider between the regulator output and REF to set thetqj嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividertqj嘉泰姆
close to the pin.tqj嘉泰姆

28tqj嘉泰姆

DRVNtqj嘉泰姆

DRVNtqj嘉泰姆

DRVNtqj嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channeltqj嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.tqj嘉泰姆

29tqj嘉泰姆

DELtqj嘉泰姆

DELtqj嘉泰姆

DELtqj嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND totqj嘉泰姆
set the high-voltage switch startup delay.tqj嘉泰姆

30tqj嘉泰姆

CTLtqj嘉泰姆

CTLtqj嘉泰姆

CTLtqj嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchtqj嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andtqj嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCtqj嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL istqj嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thantqj嘉泰姆
1.25V.tqj嘉泰姆

31tqj嘉泰姆

DRNtqj嘉泰姆

DRNtqj嘉泰姆

DRNtqj嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channeltqj嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedtqj嘉泰姆
VSRC.tqj嘉泰姆

32tqj嘉泰姆

COMtqj嘉泰姆

COMtqj嘉泰姆

COMtqj嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow thetqj嘉泰姆
voltage on COM to exceed VSRC.tqj嘉泰姆

六.电路原理图tqj嘉泰姆
七,功能概述tqj嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:tqj嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.tqj嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.tqj嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.tqj嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.tqj嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.tqj嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.tqj嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-uptqj嘉泰姆
八,相关产品tqj嘉泰姆

Switching Regulator > Boost Convertertqj嘉泰姆

 Part_No tqj嘉泰姆

Packagetqj嘉泰姆

Archi-tecture tqj嘉泰姆

Input tqj嘉泰姆

Voltage    tqj嘉泰姆

Max Adj.tqj嘉泰姆

Output tqj嘉泰姆

Voltage tqj嘉泰姆

Switch Current Limit (max) tqj嘉泰姆

Fixed tqj嘉泰姆

Output tqj嘉泰姆

Voltage  tqj嘉泰姆

Switching tqj嘉泰姆

Frequency tqj嘉泰姆

Internal Power   Switch tqj嘉泰姆

Sync. Rectifier tqj嘉泰姆

 

mintqj嘉泰姆

maxtqj嘉泰姆

mintqj嘉泰姆

maxtqj嘉泰姆

(A)tqj嘉泰姆

(V)tqj嘉泰姆

(kHz)tqj嘉泰姆

 

CXSU63133tqj嘉泰姆

SOT89tqj嘉泰姆

VM tqj嘉泰姆

0.9tqj嘉泰姆

5.5tqj嘉泰姆

2.5tqj嘉泰姆

5.5tqj嘉泰姆

0.5tqj嘉泰姆

1.8|2.6|2.8|3tqj嘉泰姆

|3.3|3.8|4.5|5tqj嘉泰姆

-tqj嘉泰姆

Notqj嘉泰姆

Yestqj嘉泰姆

CXSU63134tqj嘉泰姆

MSOP8|TSSOP8tqj嘉泰姆

|SOP8tqj嘉泰姆

VMtqj嘉泰姆

2.5tqj嘉泰姆

5.5tqj嘉泰姆

2.5tqj嘉泰姆

-tqj嘉泰姆

-tqj嘉泰姆

-tqj嘉泰姆

200 ~ 1000tqj嘉泰姆

Notqj嘉泰姆

Notqj嘉泰姆

CXSU63135tqj嘉泰姆

TSSOP8|SOP-8Ptqj嘉泰姆

VMtqj嘉泰姆

1tqj嘉泰姆

5.5tqj嘉泰姆

2.5tqj嘉泰姆

5tqj嘉泰姆

1tqj嘉泰姆

2.5|3.3tqj嘉泰姆

300tqj嘉泰姆

Yestqj嘉泰姆

Yestqj嘉泰姆

CXSU63136tqj嘉泰姆

SOP8tqj嘉泰姆

CMtqj嘉泰姆

3tqj嘉泰姆

40tqj嘉泰姆

1.25tqj嘉泰姆

40tqj嘉泰姆

1.5tqj嘉泰姆

-tqj嘉泰姆

33 ~ 100tqj嘉泰姆

Yestqj嘉泰姆

Notqj嘉泰姆

CXSU63137tqj嘉泰姆

TQFN5x5-32tqj嘉泰姆

CMtqj嘉泰姆

2.5tqj嘉泰姆

6.5tqj嘉泰姆

2.5tqj嘉泰姆

18tqj嘉泰姆

3tqj嘉泰姆

Notqj嘉泰姆

1200tqj嘉泰姆

Yestqj嘉泰姆

Notqj嘉泰姆

CXSU63138tqj嘉泰姆

TSOT23-5tqj嘉泰姆

TDFN2x2-6tqj嘉泰姆

CMtqj嘉泰姆

2.5tqj嘉泰姆

6tqj嘉泰姆

2.5tqj嘉泰姆

20tqj嘉泰姆

2tqj嘉泰姆

-tqj嘉泰姆

1500tqj嘉泰姆

Yestqj嘉泰姆

Notqj嘉泰姆

CXSU63139tqj嘉泰姆

TQFN4x4-6tqj嘉泰姆

TDFN3x3-12tqj嘉泰姆

CMtqj嘉泰姆

1.8tqj嘉泰姆

5.5tqj嘉泰姆

2.7tqj嘉泰姆

5.5tqj嘉泰姆

5tqj嘉泰姆

-tqj嘉泰姆

1.2tqj嘉泰姆

Yestqj嘉泰姆

Yestqj嘉泰姆

CXSU63140tqj嘉泰姆

SOT23-5tqj嘉泰姆

CMtqj嘉泰姆

2.5tqj嘉泰姆

6tqj嘉泰姆

2.5tqj嘉泰姆

32tqj嘉泰姆

1tqj嘉泰姆

-tqj嘉泰姆

1000tqj嘉泰姆

Yestqj嘉泰姆

Notqj嘉泰姆

CXSU63141tqj嘉泰姆

TSOT-23-6 tqj嘉泰姆

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