The JTMA3207 combines a constant-current/constant-volt-age linear single cell Li+ battery charger with a low drop-out linear regulator. Both charger and linear regulators can work independently. The

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FUNCTION

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七</span>,功能概述
Input Capacitors
The JTMA3207 requires proper input capacitors to supply surge current during stepping load transients to prevent
the input rail from dropping. The 1μF ceramic capacitors are recommended to place on the input supply pins (VIN
and VLDOIN) to the GND. Place the capacitors as close as possible to the input supply pins for well operation. In
some start-up conditions, it may necessary to protect the device against a hot plug input voltage. Adding a 6V input
zener diode between the input supply pins and the GND clamps the input voltage peak.
 
Output Capacitors
The JTMA3207 has two output pins, which are charger output pin BATT and regulator 3.3V output pin LDOOUT.
The output capacitor of charger is recommended to use 2.2μF ceramic capacitor to ensure the battery charge
stability.
The output capacitor of regulator also can use ceramic capacitor, and its proper value is between 1μF and 2.2μF,
ESR must above 10mΩ. Large output capacitor values can reduce noise and improve load-transient response,
stability, and PSRR. With X5R and X7R dielectrics, 1μF is sufficient at all operating temperatures.
 
STAT Pin
The STAT pin can be used to drive a LED or communicate with the host processor to show the charge status. When
the status is displayed by a LED, which has a current rating less than 5mA, a resistor should be selected to
connect LED in series, for programming at the desired current value. The resistor is calculated by the following
equation:

 Thermal Consideration
 
The most common measurement of package thermal performance is thermal resistance measured from the
device junction to the air surrounding the package sur-face (èJA). The èJA can be calculated by the following
equation: 
where:
TJ= device junction temperature, maximum TJ=120°C TA= ambient temperature PD= device power dissipation
The device power dissipation, PD, is a function of the charge rate, the LDO output current and the voltages drop
across the internal FETs.It can be calculated by the following equation:
 
PD = (VIN − VBATT ) × ICHG + (VLODIN − VLDOUT ) × ILDO
PCB Layout Consideration
Connecting the battery to BATT as close as possible pro-vides accurate battery voltage sensing. The input and
output decoupling capacitors and the programmed re-sistor RSET should be placed as close as possible to the
device. The high current paths (VIN and LDOIN pins for input and BATT and LDOOUT pins for output) must be
short and wide to minimize voltage drop.

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