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首页 > 产品中心 > 电源管理 > DC升压型转换器 > DC升压转换 >2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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产品简介

目录JTn嘉泰姆

1.产品概述                       2.产品特点JTn嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 JTn嘉泰姆
5.产品封装图                     6.电路原理图                   JTn嘉泰姆
7.功能概述                        8.相关产品JTn嘉泰姆

一,产品概述(General Description)         JTn嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.JTn嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.JTn嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withJTn嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewJTn嘉泰姆
rate. All inputs and outputs are rail-to-rail.JTn嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).JTn嘉泰姆
二.产品特点(Features)JTn嘉泰姆


· 2.6V to 6.5V Input Supply Range JTn嘉泰姆

· Current-Mode Step-Up Regulator JTn嘉泰姆

 - Fast Transient Response JTn嘉泰姆

 - 1.2MHz Fixed Operating Frequency JTn嘉泰姆

· ±1.5% High-Accuracy Output Voltage JTn嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET JTn嘉泰姆

· High Efficiency JTn嘉泰姆

· Low Quiescent Current (0.6mA Typical) JTn嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF JTn嘉泰姆

· High-performance Operational Amplifiers JTn嘉泰姆

 - ±150mA Output Short-Circuit CurrentJTn嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth JTn嘉泰姆

 - Rail-to-Rail Inputs/Outputs JTn嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs JTn嘉泰姆

· Over-Temperature Protection JTn嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) JTn嘉泰姆

· Lead Free Available (RoHS Compliant)JTn嘉泰姆

三,应用范围 (Applications)JTn嘉泰姆


    TFT LCD Displays for MonitorsJTn嘉泰姆
   TFT LCD Displays for Notebook ComputersJTn嘉泰姆
   Automotive DisplaysJTn嘉泰姆
四.下载产品资料PDF文档 JTn嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持JTn嘉泰姆

 QQ截图20160419174301.jpgJTn嘉泰姆

五,产品封装图 (Package)JTn嘉泰姆


blob.pngJTn嘉泰姆
blob.pngPin Function DescriptionJTn嘉泰姆

PinJTn嘉泰姆

NameJTn嘉泰姆

Function DescriptionJTn嘉泰姆

CXSU63137JTn嘉泰姆

CXSU63137-1JTn嘉泰姆

CXSU63137-2JTn嘉泰姆

1JTn嘉泰姆

SRCJTn嘉泰姆

SRCJTn嘉泰姆

SRCJTn嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassJTn嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.JTn嘉泰姆

2JTn嘉泰姆

REFJTn嘉泰姆

REFJTn嘉泰姆

REFJTn嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofJTn嘉泰姆
0.22μFcapacitor closed to the pins.JTn嘉泰姆

3JTn嘉泰姆

AGNDJTn嘉泰姆

AGNDJTn嘉泰姆

AGNDJTn嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toJTn嘉泰姆
power ground (PGND) underneath the IC.JTn嘉泰姆

4JTn嘉泰姆

PGNDJTn嘉泰姆

PGNDJTn嘉泰姆

PGNDJTn嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upJTn嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputJTn嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundJTn嘉泰姆
(AGND) underneath the IC.JTn嘉泰姆

5JTn嘉泰姆

OUT1JTn嘉泰姆

OUT1JTn嘉泰姆

OUT1JTn嘉泰姆

Output of Operational-Amplifier 1JTn嘉泰姆

6JTn嘉泰姆

NEG1JTn嘉泰姆

NEG1JTn嘉泰姆

NEG1JTn嘉泰姆

Inverting Input of Operational-Amplifier 1JTn嘉泰姆

7JTn嘉泰姆

POS1JTn嘉泰姆

POS1JTn嘉泰姆

POS1JTn嘉泰姆

Non-inverting Input of Operational-Amplifier 1JTn嘉泰姆

8JTn嘉泰姆

NCJTn嘉泰姆

OUT2JTn嘉泰姆

OUT2JTn嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalJTn嘉泰姆
connected of CXSU63137.JTn嘉泰姆

9JTn嘉泰姆

NCJTn嘉泰姆

NEG2JTn嘉泰姆

NEG2JTn嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalJTn嘉泰姆
connected of CXSU63137.JTn嘉泰姆

10JTn嘉泰姆

ICJTn嘉泰姆

POS2JTn嘉泰姆

POS2JTn嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalJTn嘉泰姆
connected to GND of CXSU63137JTn嘉泰姆

11JTn嘉泰姆

BGNDJTn嘉泰姆

BGNDJTn嘉泰姆

BGNDJTn嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)JTn嘉泰姆
underneath the IC.JTn嘉泰姆

12JTn嘉泰姆

NCJTn嘉泰姆

NCJTn嘉泰姆

POS3JTn嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalJTn嘉泰姆
connected of CXSU63137/CXSU63137.JTn嘉泰姆

13JTn嘉泰姆

NCJTn嘉泰姆

NCJTn嘉泰姆

OUT3JTn嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.JTn嘉泰姆

14JTn嘉泰姆

SUPJTn嘉泰姆

SUPJTn嘉泰姆

SUPJTn嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassJTn嘉泰姆
SUP to BGND with a 0.1μF capacitor.JTn嘉泰姆

15JTn嘉泰姆

NCJTn嘉泰姆

POS3JTn嘉泰姆

POS4JTn嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingJTn嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.JTn嘉泰姆

16JTn嘉泰姆

NCJTn嘉泰姆

NEG3JTn嘉泰姆

NEG4JTn嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofJTn嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.JTn嘉泰姆

17JTn嘉泰姆

NCJTn嘉泰姆

OUT3JTn嘉泰姆

OUT4JTn嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofJTn嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.JTn嘉泰姆

18JTn嘉泰姆

ICJTn嘉泰姆

ICJTn嘉泰姆

POS5JTn嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedJTn嘉泰姆
to GND of CXSU63137/CXSU63137.JTn嘉泰姆

19JTn嘉泰姆

NCJTn嘉泰姆

NCJTn嘉泰姆

NEG5JTn嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedJTn嘉泰姆
of CXSU63137/CXSU63137.JTn嘉泰姆

20JTn嘉泰姆

NCJTn嘉泰姆

NCJTn嘉泰姆

OUT5JTn嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.JTn嘉泰姆

21JTn嘉泰姆

LXJTn嘉泰姆

LXJTn嘉泰姆

LXJTn嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorJTn嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.JTn嘉泰姆

22JTn嘉泰姆

INJTn嘉泰姆

INJTn嘉泰姆

INJTn嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeJTn嘉泰姆
from 2.6V to 6.5V.JTn嘉泰姆

23JTn嘉泰姆

FBJTn嘉泰姆

FBJTn嘉泰姆

FBJTn嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromJTn嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinJTn嘉泰姆
5mm of FB.JTn嘉泰姆

24JTn嘉泰姆

COMPJTn嘉泰姆

COMPJTn嘉泰姆

COMPJTn嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCJTn嘉泰姆
from COMP to AGND.JTn嘉泰姆

PinFunction DescriptionJTn嘉泰姆

PinJTn嘉泰姆

NameJTn嘉泰姆

Function DescriptionJTn嘉泰姆

CXSU63137JTn嘉泰姆

CXSU63137-1JTn嘉泰姆

CXSU63137-2JTn嘉泰姆

24JTn嘉泰姆

COMPJTn嘉泰姆

COMPJTn嘉泰姆

COMPJTn嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCJTn嘉泰姆
from COMP to AGND.JTn嘉泰姆

25JTn嘉泰姆

FBPJTn嘉泰姆

FBPJTn嘉泰姆

FBPJTn嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aJTn嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theJTn嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerJTn嘉泰姆
close to the pin.JTn嘉泰姆

26JTn嘉泰姆

DRVPJTn嘉泰姆

DRVPJTn嘉泰姆

DRVPJTn嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelJTn嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.JTn嘉泰姆

27JTn嘉泰姆

FBNJTn嘉泰姆

FBNJTn嘉泰姆

FBNJTn嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aJTn嘉泰姆
resistive voltage-divider between the regulator output and REF to set theJTn嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerJTn嘉泰姆
close to the pin.JTn嘉泰姆

28JTn嘉泰姆

DRVNJTn嘉泰姆

DRVNJTn嘉泰姆

DRVNJTn嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelJTn嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.JTn嘉泰姆

29JTn嘉泰姆

DELJTn嘉泰姆

DELJTn嘉泰姆

DELJTn嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toJTn嘉泰姆
set the high-voltage switch startup delay.JTn嘉泰姆

30JTn嘉泰姆

CTLJTn嘉泰姆

CTLJTn嘉泰姆

CTLJTn嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchJTn嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andJTn嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCJTn嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isJTn嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanJTn嘉泰姆
1.25V.JTn嘉泰姆

31JTn嘉泰姆

DRNJTn嘉泰姆

DRNJTn嘉泰姆

DRNJTn嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelJTn嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedJTn嘉泰姆
VSRC.JTn嘉泰姆

32JTn嘉泰姆

COMJTn嘉泰姆

COMJTn嘉泰姆

COMJTn嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theJTn嘉泰姆
voltage on COM to exceed VSRC.JTn嘉泰姆

六.电路原理图JTn嘉泰姆
七,功能概述JTn嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:JTn嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.JTn嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.JTn嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.JTn嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.JTn嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.JTn嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.JTn嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upJTn嘉泰姆
八,相关产品JTn嘉泰姆

Switching Regulator > Boost ConverterJTn嘉泰姆

 Part_No JTn嘉泰姆

PackageJTn嘉泰姆

Archi-tecture JTn嘉泰姆

Input JTn嘉泰姆

Voltage    JTn嘉泰姆

Max Adj.JTn嘉泰姆

Output JTn嘉泰姆

Voltage JTn嘉泰姆

Switch Current Limit (max) JTn嘉泰姆

Fixed JTn嘉泰姆

Output JTn嘉泰姆

Voltage  JTn嘉泰姆

Switching JTn嘉泰姆

Frequency JTn嘉泰姆

Internal Power   Switch JTn嘉泰姆

Sync. Rectifier JTn嘉泰姆

 

minJTn嘉泰姆

maxJTn嘉泰姆

minJTn嘉泰姆

maxJTn嘉泰姆

(A)JTn嘉泰姆

(V)JTn嘉泰姆

(kHz)JTn嘉泰姆

 

CXSU63133JTn嘉泰姆

SOT89JTn嘉泰姆

VM JTn嘉泰姆

0.9JTn嘉泰姆

5.5JTn嘉泰姆

2.5JTn嘉泰姆

5.5JTn嘉泰姆

0.5JTn嘉泰姆

1.8|2.6|2.8|3JTn嘉泰姆

|3.3|3.8|4.5|5JTn嘉泰姆

-JTn嘉泰姆

NoJTn嘉泰姆

YesJTn嘉泰姆

CXSU63134JTn嘉泰姆

MSOP8|TSSOP8JTn嘉泰姆

|SOP8JTn嘉泰姆

VMJTn嘉泰姆

2.5JTn嘉泰姆

5.5JTn嘉泰姆

2.5JTn嘉泰姆

-JTn嘉泰姆

-JTn嘉泰姆

-JTn嘉泰姆

200 ~ 1000JTn嘉泰姆

NoJTn嘉泰姆

NoJTn嘉泰姆

CXSU63135JTn嘉泰姆

TSSOP8|SOP-8PJTn嘉泰姆

VMJTn嘉泰姆

1JTn嘉泰姆

5.5JTn嘉泰姆

2.5JTn嘉泰姆

5JTn嘉泰姆

1JTn嘉泰姆

2.5|3.3JTn嘉泰姆

300JTn嘉泰姆

YesJTn嘉泰姆

YesJTn嘉泰姆

CXSU63136JTn嘉泰姆

SOP8JTn嘉泰姆

CMJTn嘉泰姆

3JTn嘉泰姆

40JTn嘉泰姆

1.25JTn嘉泰姆

40JTn嘉泰姆

1.5JTn嘉泰姆

-JTn嘉泰姆

33 ~ 100JTn嘉泰姆

YesJTn嘉泰姆

NoJTn嘉泰姆

CXSU63137JTn嘉泰姆

TQFN5x5-32JTn嘉泰姆

CMJTn嘉泰姆

2.5JTn嘉泰姆

6.5JTn嘉泰姆

2.5JTn嘉泰姆

18JTn嘉泰姆

3JTn嘉泰姆

NoJTn嘉泰姆

1200JTn嘉泰姆

YesJTn嘉泰姆

NoJTn嘉泰姆

CXSU63138JTn嘉泰姆

TSOT23-5JTn嘉泰姆

TDFN2x2-6JTn嘉泰姆

CMJTn嘉泰姆

2.5JTn嘉泰姆

6JTn嘉泰姆

2.5JTn嘉泰姆

20JTn嘉泰姆

2JTn嘉泰姆

-JTn嘉泰姆

1500JTn嘉泰姆

YesJTn嘉泰姆

NoJTn嘉泰姆

CXSU63139JTn嘉泰姆

TQFN4x4-6JTn嘉泰姆

TDFN3x3-12JTn嘉泰姆

CMJTn嘉泰姆

1.8JTn嘉泰姆

5.5JTn嘉泰姆

2.7JTn嘉泰姆

5.5JTn嘉泰姆

5JTn嘉泰姆

-JTn嘉泰姆

1.2JTn嘉泰姆

YesJTn嘉泰姆

YesJTn嘉泰姆

CXSU63140JTn嘉泰姆

SOT23-5JTn嘉泰姆

CMJTn嘉泰姆

2.5JTn嘉泰姆

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