CXSD62115 two-phase PWM control IC, provides a precision voltage regulation system for advanced graphic microprocessors in graphics card applications. The inte-gration of power MOSFET drivers int

发布时间:2020-04-06 09:43:38 浏览次数:701 作者:嘉泰姆 来源:1
摘要:CXSD62115 two-phase PWM control IC, provides a precision voltage regulation system for advanced graphic microprocessors in graphics card applications. The inte-gration of power MOSFET drivers int

目录vH0嘉泰姆

1.产品概述                       2.产品特点
3.应用范围                       4.下载产品资料PDF文档 
5.产品封装图</span>                     6.电路原理图</span>                   
7.
功能概述
                        8.相关产品vH0嘉泰姆

,产品概述(General Description)    vH0嘉泰姆


  The CXSD62115, two-phase PWM control IC, provides a precision voltage regulation system for advanced graphic microprocessors in graphics card applications. The inte-gration of power MOSFET drivers into the controller IC
reduces the number of external parts for a cost and space saving power management solution.
  The CXSD62115 uses a voltage-mode PWM architecture,operating with fixed-frequency, to provide excellent load transient response. The device uses the voltage across the DCRs of the inductors for current sensing. Load line
voltage positioning (DROOP), channel-current balance,and over-current protection are accomplished through continuous inductor DCR current sensing.
The MODE pin programs single- or two- phase operation.When IC operates in two-phase mode normally, it can transfer two-phase mode to single phase mode at liberty.Nevertheless, once operates in single-phase mode, the operation mode is latched. It is required to toggle SS or 5VCC pin to reset the IC. Such feature of the MODE pin makes the CXSD62115 ideally suitable for dual power input applications, such as PCIE interfaced graphic cards. This control IC‘s protection features include a set of so- phisticated over-temperature, over-voltage, under-voltage, and over-current protections. Over-voltage results in the converter turning the lower MOSFETs on to clamp the rising output voltage and protects the microprocessor.The over-current protection level is set through externalresistors. The device also provides a power-on-reset func-tion and a programmable soft-start to prevent wrong op-eration and limit the input surge current during power-on or start-up.
 The CXSD62115 is available in a QFN4x4-24A package

二</span>.产品特点(Features)vH0嘉泰姆


Voltage-Mode Operation with Current Sharing
- Adjustable Feedback Compensation
- Fast Load Transient Response
Operate with 8V~13.2 VCC Supply Voltage
Programmable 3-Bit DAC Reference
-±1.5% System Accuracy Over-Temperature
Support Single- and Two-Phase Operations
5V Linear Regulator Output on 5VCC
8~12V Gate Drivers with Internal Bootstrap Diode
Lossless Inductor DCR Current Sensing
Fixed 300kHz Operating Frequency Per Phase
Power-OK Indicator Output
- Regulated 1.5V on POK
Adjustable Over-Current Protection (OCP)
Accurate Load Line (DROOP) Programming
Adjustable Soft-Start
Over-Voltage Protection (OVP)
Under-Voltage Protection (UVP)
Over-Temperature Protection (OTP)
QFN4x4 24-Lead Package (QFN4x4-24A)
Lead Free and Green Devices Available
(RoHS Compliant)

三</span>,应用范围 (Applications)vH0嘉泰姆


Graphics Card GPU Core Power SupplyvH0嘉泰姆

Motherboard Chipset or DDR SDRAM Core Power Supply
On-Board High Power PWM Converter with
vH0嘉泰姆

Output Current up to 60A
四.下载产品资料PDF文档 vH0嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持</span>!</span>vH0嘉泰姆

 QQ截图20160419174301.jpgvH0嘉泰姆

五,产品封装图 (Package)vH0嘉泰姆


vH0嘉泰姆

blob.pngblob.pngvH0嘉泰姆

六.电路原理图</span>vH0嘉泰姆


blob.pngvH0嘉泰姆

七</span>,功能概述vH0嘉泰姆


Layout Consideration vH0嘉泰姆

In any high switching frequency converter, a correct lay-out is important to ensure proper operation of the
regulator. With power devices switching at higher frequency, the resulting current transient will cause volt-
age spike across the interconnecting impedance and parasitic circuit elements. As an example, consider the
turn-off transition of the PWM MOSFET. Before turn-off condition, the MOSFET is carrying the full load current.
During turn-off, current stops flowing in the MOSFET and is freewheeling by the lower MOSFET and parasitic diode.
Any parasitic inductance of the circuit generates a large voltage spike during the switching interval. In general,
using short and wide printed circuit traces should mini-mize interconnecting impedances and the magnitude of
voltage spike. And signal and power grounds are to be kept separating and finally combined to use the ground
plane construction or single point grounding. The best tie-point between the signal ground and the power ground is at the negative side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the IC are not recommended. Below is a checklist for your layout:
close their pins. (For example, place the decoupling ce-ramic capacitor near the drain of the high-side MOSFET
as close as possible. The bulk capacitors are also placed near the drain).
- The input capacitor should be near the drain of the up-per MOSFET; the high quality ceramic decoupling capaci-tor can be put close to the VCC and GND pins; the VTTREF decoupling capacitor should be close to the VTTREF pin and GND; the VDDQ and VTT output capacitors should be located right across their output pin as close as pos-sible to the part to minimize parasitic. The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.
- The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking. And PHASE pin
traces are also the return path for UGATE. Connect this pin to the converter’s upper MOSFET source.
- The CXSD62115 used ripple mode control. Build the re- sistor divider close to the VFB pin so that the high imped- ance trace is shorter. And the VFB pin traces can’t be closed to the switching signal traces (UGATE, LGATE,BOOT, and PHASE).
- The PGND trace should be a separate trace, and inde-pendently go to the source of the low-side MOSFETs for
current limit accuracy.vH0嘉泰姆

Layout Consideration
- Keep the switching nodes (UGATE, LGATE, BOOT, and PHASE) away from sensitive small signal nodes(VFB,VTTREF, and CS) since these nodes are fast moving signals. Therefore, keep traces to these nodes as short as possible and there should be no other weak signal traces in parallel with theses traces on any layer.
- The signals going through theses traces have both high dv/dt and high di/dt, with high peak charging and dis-charging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be short and wide.
- Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Minimiz-ing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.vH0嘉泰姆

- Decoupling vH0嘉泰姆

 capacitor, the resistor dividers, boot capacitors, and current limit stetting resistor should bevH0嘉泰姆

CXSD62115vH0嘉泰姆

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0.6vH0嘉泰姆

5vH0嘉泰姆

600vH0嘉泰姆

CXSD62103vH0嘉泰姆

QFN4x4-24vH0嘉泰姆

VMvH0嘉泰姆

2vH0嘉泰姆

1vH0嘉泰姆

50vH0嘉泰姆

4.5vH0嘉泰姆

13.2vH0嘉泰姆

0.6vH0嘉泰姆

5~12vH0嘉泰姆

5000vH0嘉泰姆

CXSD62104vH0嘉泰姆

TQFN4x4-24vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

6vH0嘉泰姆

25vH0嘉泰姆

2vH0嘉泰姆

NvH0嘉泰姆

550vH0嘉泰姆

CXSD62105vH0嘉泰姆

TQFN4x4-24vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

6vH0嘉泰姆

25vH0嘉泰姆

2vH0嘉泰姆

NvH0嘉泰姆

550vH0嘉泰姆

CXSD62106|AvH0嘉泰姆

TQFN4x4-4vH0嘉泰姆

TQFN3x3-20vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

20vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

800vH0嘉泰姆

CXSD62107vH0嘉泰姆

TQFN3x3-16vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

1vH0嘉泰姆

20vH0嘉泰姆

1.8vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

400vH0嘉泰姆

CXSD62108vH0嘉泰姆

QFN3.5x3.5-14vH0嘉泰姆

TQFN3x3-16vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

1vH0嘉泰姆

20vH0嘉泰姆

1.8vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

400vH0嘉泰姆

CXSD62109vH0嘉泰姆

TQFN3x3-16vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

20vH0嘉泰姆

1.8vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

400vH0嘉泰姆

CXSD62110vH0嘉泰姆

QFN3x3-20vH0嘉泰姆

TQFN3x3-16vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

20vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

1.8|1.5|0.5vH0嘉泰姆

5vH0嘉泰姆

740vH0嘉泰姆

CXSD62111vH0嘉泰姆

TQFN4x4-24vH0嘉泰姆

|QFN3x3-20vH0嘉泰姆

CMvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

5vH0嘉泰姆

28vH0嘉泰姆

0.5vH0嘉泰姆

NvH0嘉泰姆

3000vH0嘉泰姆

CXSD62112vH0嘉泰姆

TDFN3x3-10vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

1vH0嘉泰姆

20vH0嘉泰姆

1.8vH0嘉泰姆

28vH0嘉泰姆

0.5vH0嘉泰姆

5vH0嘉泰姆

250vH0嘉泰姆

CXSD62113|CvH0嘉泰姆

TQFN3x3-20vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

6vH0嘉泰姆

25vH0嘉泰姆

2vH0嘉泰姆

NvH0嘉泰姆

550vH0嘉泰姆

CXSD62113EvH0嘉泰姆

TQFN 3x3 20vH0嘉泰姆

COTvH0嘉泰姆

2vH0嘉泰姆

2vH0嘉泰姆

11vH0嘉泰姆

6vH0嘉泰姆

25vH0嘉泰姆

2vH0嘉泰姆

NvH0嘉泰姆

550vH0嘉泰姆

CXSD62114vH0嘉泰姆

TQFN3x3-20vH0嘉泰姆

COTvH0嘉泰姆

2vH0嘉泰姆

2vH0嘉泰姆

11vH0嘉泰姆

5.5vH0嘉泰姆

25vH0嘉泰姆

2vH0嘉泰姆

NvH0嘉泰姆

280vH0嘉泰姆

CXSD62115vH0嘉泰姆

QFN4x4-24vH0嘉泰姆

VMvH0嘉泰姆

2vH0嘉泰姆

1vH0嘉泰姆

60vH0嘉泰姆

3.1vH0嘉泰姆

13.2vH0嘉泰姆

0.85vH0嘉泰姆

12vH0嘉泰姆

5000vH0嘉泰姆

CXSD62116A|B|CvH0嘉泰姆

SOP-8PvH0嘉泰姆

VMvH0嘉泰姆

1vH0嘉泰姆

1vH0嘉泰姆

20vH0嘉泰姆

2.9vH0嘉泰姆

13.2vH0嘉泰姆

0.8vH0嘉泰姆

12vH0嘉泰姆

16000vH0嘉泰姆

CXSD62117vH0嘉泰姆

SOP-20vH0嘉泰姆

VMvH0嘉泰姆

2vH0嘉泰姆

2vH0嘉泰姆

30vH0嘉泰姆

10vH0嘉泰姆

13.2vH0嘉泰姆

1vH0嘉泰姆

12vH0嘉泰姆

5000vH0嘉泰姆

CXSD62118vH0嘉泰姆

TDFN3x3-10vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

1vH0嘉泰姆

25vH0嘉泰姆

1.8vH0嘉泰姆

28vH0嘉泰姆

0.7vH0嘉泰姆

5vH0嘉泰姆

250vH0嘉泰姆

CXSD62119vH0嘉泰姆

TQFN3x3-20vH0嘉泰姆

COTvH0嘉泰姆

2vH0嘉泰姆

1vH0嘉泰姆

40vH0嘉泰姆

1.8vH0嘉泰姆

25vH0嘉泰姆

REFIN SettingvH0嘉泰姆

5vH0嘉泰姆

700vH0嘉泰姆

CXSD62120vH0嘉泰姆

QFN 3x3 20vH0嘉泰姆

TQFN 3x3 16vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

20vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

1.8|1.5 1.35|1.2 0.5vH0嘉泰姆

5vH0嘉泰姆

800vH0嘉泰姆

CXSD62121AvH0嘉泰姆

TQFN3x3 20vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

220vH0嘉泰姆

CXSD62121BvH0嘉泰姆

TQFN3x3 20vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

15vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

220vH0嘉泰姆

CXSD62121vH0嘉泰姆

TQFN3x3-20vH0嘉泰姆

COTvH0嘉泰姆

1vH0嘉泰姆

2vH0嘉泰姆

20vH0嘉泰姆

3vH0嘉泰姆

28vH0嘉泰姆

0.75vH0嘉泰姆

5vH0嘉泰姆

180vH0嘉泰姆


vH0嘉泰姆

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