CXSD6299|A电压模式固定300kHz开关频率和同步降压控制器允许宽输入电压为5~12V

目录

1.产品概述                       2.产品特点
3.应用范围                       4.下载产品资料PDF文档 
5.产品封装图                     6.电路原理图                   
7.功能概述                        8.相关产品

一,产品概述(General Description)         

 The CXSD6299 is a voltage mode, fixed 300kHz-switch-ing frequency,
and synchronous buck controller. The CXSD6299 allows wide input voltage
that is either a single 5~12V or two supply voltage(s) for various applications.
A power-on-reset (POR) circuit monitors the VCC supply voltage to prevent
wrong logic controls. A built-in digital soft-start circuit prevents the output
voltages from over-shoot as well as limits the input current. An internal 0.8V

temperature-compensated reference voltage with high accuracy is designed to 

meet the requirement of low out-put voltage applications. The CXSD6299 

provides excel-lent output voltage regulations against load current variation.

 The controller’s over-current protection monitors the out-put current by
using the voltage drops across the RDS(ON)of low-side MOSFET, eliminating
the need for a current sensing resistor that features high efficiency and low cost.

The CXSD6299 also integrates over-voltage protection (OVP) and under-voltage 

protection circuit which moni-tors the FB voltage to prevent the PWM output 

from over and under voltage.

  The CXSD6299 is available in a simple SOP-8P package
二.产品特点(Features)

1.)Wide Operation Supply Voltage from 5V to 12V
2.)Power-On-Reset Monitoring on VCC
3.)Excellent Reference Voltage Regulations
     - 0.8V Internal Reference
     - ±1% Over-Temperature Range
4.)Integrated Soft-Start
5.)Automatic PSM/PWM Modes
6.)Voltage Mode PWM Operation with 90% (Max.)Duty Cycle
7.)Under-Voltage Protection
8.)Adjustable Over-Current Protection Threshold
- Sensing the RDS(ON) of Low-Side MOSFET
9.)Over-Voltage Protection Under-Voltage Protection
     Simple SOP-8P Package
10.)Lead Free and Green Devices Available (RoHS Compliant)
三,应用范围 (Applications)

Graphic Cards
DSL, Switch HUB
Wireless Lan
Notebook Computer
Mother Board
LCD Monitor/TV
四.下载产品资料PDF文档 

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五,产品封装图 (Package)

六.电路原理图

七,功能概述

Layout Consideration
In any high switching frequency converter, a correct lay-out is important to ensure proper operation of the
regulator. With power devices switching at 300kHz,the resulting current transient will cause voltage spike across
the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transition
of the PWM MOSFET. Before turn-off, the MOSFET is car-rying the full load current. During turn-off, current stops
flowing in the MOSFET and is free-wheeling by the lower MOSFET and parasitic diode. Any parasitic inductance of
the circuit generates a large voltage spike during the switching interval. In general, using short and wide printed
circuit traces should minimize interconnecting imped-
Layout Consideration (Cont.)
ances and the magnitude of voltage spike. And signal and power grounds are to be kept separate till combined
using ground plane construction or single point grounding. Figure 8. illustrates the layout, with bold lines
indicating high current paths; these traces must be short and wide. Components along the bold lines should be
placed lose together. Below is a checklist for your layout:
- Keep the switching nodes (UGATE, LGATE, and PHASE) away from sensitive small signal nodes since these
nodes are fast moving signals. Therefore, keep traces to these nodes as short as possible.
The traces from the gate drivers to the MOSFETs (UG and LG) should be short and wide.
- Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Minimiz-
ing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.
- Decoupling capacitor, compensation component, the resistor dividers, and boot capacitors should be close
their pins. (For example, place the decoupling ceramic capacitor near the drain of the high-side MOSFET as
close as possible. The bulk capacitors are also placed near the drain).
- The input capacitor should be near the drain of the up-per MOSFET; the output capacitor should be near the
loads. The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.
- The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking.
- The ROCSET resistance should be placed near the IC as close as possible.

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