|
PIN |
FUNCTION |
|
NO. |
NAME |
|
SOP-14 |
|
SSOP-16 |
QFN4x4-16 |
|
1 |
|
1 |
15 |
BOOT |
This pin provides the bootstrap voltage to the upper gate driver for driving the
N-channel MOSFET. An external capacitor from PHASE to BOOT, an internal
diode, and the power supply voltage VCC12, generates the bootstrap voltage
for the upper gate diver (UGATE). |
|
2 |
2 |
16 |
FS_DIS |
This pin provides shutdown function. When pulling low the FS_DIS pin near
GND will shutdown both regulators; almost any NFET or other pull-down
device (< 1k. impedance) should work. Upon release of the FS_DIS pin, it will
enable both outputs back into regulation. |
|
3 |
3 |
1 |
COMP |
This pin is the output of PWM error amplifier. It is used to set the
compensation components. |
|
4 |
4 |
2 |
FB |
This pin is the inverting input of the PWM error amplifier. It is used to set the
output voltage and the compensation components. This pin is also monitored
for under-voltage protection, when the FB voltage is under 50% of reference
voltage (0.4V), both outputs will be shutdowned immediately. |
|
5 |
5 |
3 |
DRIVE |
This pin drives the gate of an external N-channel MOSFET for linear regulator.
It is also used to set the compensation for some specific applications, for
example, with low values of output capacitance and ESR. |
|
6 |
6 |
4 |
FBL |
This pin is the inverting input of the linear regulator error amplifier. It is used to
set the output voltage. This pin is also monitored for under-voltage protection,
when the FBL voltage is under 50% of reference voltage
(0.4V), both outputs will be shutdown immediately. |
|
7 |
7,8 |
5,6 |
GND |
This pin is the signal ground pin. Connect the GND pin to a good ground
plane. |
|
8 |
9,10 |
7,8 |
VCC12 |
Power supply input pin. Connect a nominal 12V power supply to this pin. The
power-on reset function monitors the input voltage at this pin. It is
recommended that a decoupling capacitor (1 to 10µF) be connected to GND
for noise decoupling. |
|
9 |
11 |
9 |
REF_OUT |
This pin provides a buffed voltage, which is from internal reference voltage. It
is recommended that a 1mF capacitor is connected to ground for stability.
When VOCSET is above 1V, the REF_OUT buffer will be closed, the
VREF_OUT is 0V. |
|
10 |
12 |
10 |
OCSET |
Connect a resistor (ROCSET) from this pin to GND, an internal 40mA current
source will flow through this resistor and create a voltage drop. When VCC12
reaches the POR rising threshold voltage, the voltage drop of ROCSET will be
memoried and compared with the voltage across the lower MOSFET. The
threshold of the over current limit is therefore given by:
IOCSET × ROCSET
ILIMIT =
RDS(ON)(LOW − Side)
The JTMA7068 has a internal OCP voltage source, and the value is around
0.25V. When the ROCSET x IOCSET is bigger than 0.25V or the OCSET PIN
is floating (no ROCSET resistor), the over current threshold will be the internal
default value 0.25V. |
|
11 |
13 |
11 |
LGATE |
This pin is the gate driver for the lower MOSFET of PWM output. |
|
12 |
14 |
12 |
PGND |
This pin is the power ground pin for the lower gate driver. It should be tied to
GND pin on the board. |
|
13 |
15 |
13 |
PHASE |
This pin is the return path for the upper gate driver. Connect this pin to the
upper MOSFET source, and connect a capacitor to BOOT for the bootstrap
voltage. This pin is also used to monitor the voltage drop across the lower
MOSFET for over-current protection. |
|
14 |
16 |
14 |
UGATE |
This pin is the gate driver for the upper MOSFET of PWM output. |
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