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七,功能概述 Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductorripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The equation (2) shows that the inductance value has a direct effect on ripple current.Accepting larger values of ripple current allows the use of low inductances but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆I ≤ 0.4. IOUT(MAX). Remember, the maximum ripple current occurs at the maximum input voltage. Output Diode Selection The Schottky diode carries load current during the offtime. Therefore, the average diode current is dependent on the P-channel power MOSFET duty cycle. At high input voltages, the diode conducts most of the time. As VIN ap- proaches VOUT, the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the output is short-circuited. Therefore, it is important to adequately specify the diode peak current and av- erage power dissipation so as not to exceed the diode ratings. In high power switching regulator, a correct layout is important to ensure proper operation of the regulator. In general, interconnecting impedance should be minimized by using short and wide printed circuit traces. Signal and power grounds are to be kept separating and finally c om bined using ground plane construction or single point grounding. Figure 2 illustrates the layout, with bold lines indicating high current paths. Components along the bold lines should be placed close together. Below is a checklist for your layout:
1. Begin the layout by placing the power components first.Orient the power circuitry to achieve a clean power flow
path. If possible, make all the connections on one side of the PCB with wide and copper filled areas.
2. In Figure 2, the loops with same color bold lines conduct high slew rate current. These interconnecting im-
pedances should be minimized by using wide and short printed circuit traces.3. Keep the sensitive small signal nodes (FB, COMP)away from switching nodes (LX or others) on the PCB. Therefore, place the feedback divider and the feedback compensation network close to the IC to avoid switch- ing noise. Connect the ground of feedback divider directly to the GND pin of the IC using a dedicated ground trace. 4. The VCC decoupling capacitor should be right next to the VCC and GND pins. Capacitor C2 should be connected as close to the VIN and UGND pins as possible. 5. Place the decoupling ceramic capacitor C1 near the VIN as close as possible. The bulk capacitors C8 are also placed near VIN. Use a wide power ground plane to connect the C1, C8, C4, and Schottky diode to pro- vide a low impedance path between the components for large and high slew rate current. 八,相关产品
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