Pin |
Name |
Function Description |
JTMA7130 |
JTMA7131 |
JTMA7132 |
24 |
COMP |
COMP |
COMP |
Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC
from COMP to AGND. |
25 |
FBP |
FBP |
FBP |
Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of a
resistive voltage-divider between the regulator output and AGND to set the
gate-on linear regulator output voltage. Place the resistive voltage-divider
close to the pin. |
26 |
DRVP |
DRVP |
DRVP |
Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel
MOSFET. Connect DRVP to the base of an external PNP pass transistor. |
27 |
FBN |
FBN |
FBN |
Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of a
resistive voltage-divider between the regulator output and REF to set the
gate-off linear regulator output voltage. Place the resistive voltage-divider
close to the pin. |
28 |
DRVN |
DRVN |
DRVN |
Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel
MOSFET. Connect DRVN to the base of an external NPN pass transistor. |
29 |
DEL |
DEL |
DEL |
High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to
set the high-voltage switch startup delay. |
30 |
CTL |
CTL |
CTL |
High-Voltage Switch Control Input. When CTL is high, the high-voltage switch
between COM and SRC is on and the high-voltage switch between COM and
DRN is off. When CTL is low, the high-voltage switch between COM and SRC
is off and the high-voltage switch between COM and DRN is on. CTL is
inhibited by the undervoltage lockout and when the voltage on DEL is less than
1.25V. |
31 |
DRN |
DRN |
DRN |
Switch Input. Drain of the internal high-voltage back-to-back P-channel
MOSFETs connected to COM. Do not allows the voltage on DRN to exceed
VSRC. |
32 |
COM |
COM |
COM |
Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the
voltage on COM to exceed VSRC. |